Trench-gate MOSFET devices are widely used in power management field due to their outstanding efficiency performance and low cost. When they are used in circuits with inductive loads, the unclamped inductive switching (UIS) capability becomes a key parameter of the trench-gate MOSFET devices.
FIG. 1 schematically illustrates a MOSFET device used in a circuit with an inductive load. As illustrated in FIG. 1, the inductor L releases energy through the MOSFET M when the MOSFET M is turned on. Because the inductor current should be continuous, the body diode A of the MOSFET M is broken down and the inductor L continues to release energy through the body diode A when the MOSFET M is turned off. The UIS capability indicates the ability of the MOSFET device to dissipate all the energy stored in the inductive load through its body diode without suffering any damage.
FIG. 2 illustrates a plurality of prior art N-type trench-gate MOSFET devices. Referring to a separate N-type trench-gate MOSFET of FIG. 2, the trench-gate MOSFET comprises an N-type substrate N-sub configured as the drain D of the MOSFET and an N-type epitaxial layer N-epi formed on the substrate N-sub. A gate dielectric layer GOX with a polysilicon region Poly located therein is formed in the epitaxial layer N-epi. The polysilicon region Poly is configured as the gate G of the MOSFET. The trench-gate MOSFET also comprises a P-type body region P-body adjacent to the gate dielectric layer GOX, an N-type highly doped region located on the body region P-body and configured as the source of the MOSFET, and a source metal contact S. The trench-gate MOSFET further comprises a P-type highly doped region located beneath the source metal contact S.
As shown in FIG. 2, in the trench-gate MOSFET, an equivalent parasitic diode A is formed between the epitaxial layer N-epi and the body region P-body. The trench-gate MOSFET also comprises an equivalent parasitic bipolar transistor B with its base in the body region P-body, its emitter in the N-type highly doped region and its collector in the epitaxial layer N-epi.
FIG. 3 illustrates the reverse current of the trench-gate MOSFET device shown in FIG. 2 under UIS condition. As shown in FIG. 3, when a reverse breakdown occurs in the equivalent parasitic diode A of the trench-gate MOSFET under the UIS condition, a reverse current flows from the drain D to the source S and a forward voltage is generated between the body region P-body and the N-type highly doped region. The body region P-body is lightly doped and has a relatively high resistance, thus the forward voltage is relatively high and greater than the base-to-emitter on-threshold VBEon of the parasitic bipolar transistor B. As a result, the parasitic bipolar transistor B is turned on, and the reverse current is magnified and out of control. The MOSFET can not be turned off by the gate voltage and will be destroyed permanently.
Thus, improving the UIS capability of the trench-gate MOSFET device is highly desired.